Modern wireless communication systems require high data rates and efficient spectrum utilization which result in non-constant envelope modulation schemes and signals having high peak-to-average power ratios (“PAPR”). This causes the power amplifier (“PA”) in the transmitter to operate at large power back-off, where traditional PA's show poor efficiency. Efficiency of the power amplifier is critical in portable wireless devices as a higher efficiency of the PA leads to longer battery lifetime. Further, in base station applications, high efficiency PA's are necessary to reduce power consumption and heat sinking costs.
Process variations during the manufacturing process also give rise to problems with conventional PA's. Specifically, with more and more integration of RF power amplifiers in deeply scaled CMOS technologies, it is becoming increasingly difficult to exert sufficient control on process variations to ensure proper functionality and performance of the PA. Another challenge is posed by the reliability issues such as oxide break down and hot carrier stress, which are critical in power amplifiers due to large signal excursions.
Conventionally, the challenges of dealing with efficiency reduction with power back-off, performance degradation due to process variation, and reliability issues have been addressed by modifying traditional PA circuits. Efficiency improvement techniques include Doherty architecture, envelope tracking (“ET”), envelope elimination and restoration (“EER”) techniques, out-phasing or linear amplification using nonlinear components (“LINC”), and pulse-width modulation. These techniques, however, have their own disadvantages.
Therefore, there is a desire for improved PA's that address one or more of the disadvantages discussed above. Various embodiments of the present invention address these desires.